AT89C51CC03C-S3SIM【PDF 42/198 页】IC 8051 MCU FLASH 64K 52PLCC

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136

AT89C51CC03

4182O–CAN–09/08

Figure 65. Mode Fault Conditions in Slave Mode

Note:

when SS is discarded (SS disabled) it is not possible to detect a MODF error in slave

mode because the SPI is internally selected. Also the SS pin becomes a general pur-

pose I/O.

OverRun Condition

This error mean that the speed is not adapted for the running application:

An OverRun condition occurs when a byte has been received whereas the previous one

has not been read by the application yet.

The last byte (which generate the overrun error) does not overwrite the unread data so

that it can still be read. Therefore, an overrun error always indicates the loss of data.

Interrupts

Three SPI status flags can generate a CPU interrupt requests:

Table 91. SPI Interrupts

Serial Peripheral data transfer flag, SPIF: This bit is set by hardware when a transfer

has been completed. SPIF bit generates transmitter CPU interrupt request only when

SPTEIE is disabled.

Mode Fault flag, MODF: This bit is set to indicate that the level on the SS is inconsistent

with the mode of the SPI (in both master and slave modes).

Serial Peripheral Transmit Register empty flag, SPTE: This bit is set when the transmit

buffer is empty (other data can be loaded is SPDAT). SPTE bit generates transmitter

CPU interrupt request only when SPTEIE is enabled.

Note: While using SPTE interruption for “burst mode” transfers (SPTEIE=’1’), the

user software application should take care to clear SPTEIE, during the last but one

data reception (to be able to generate an interrupt on SPIF flag at the end of the last

data reception).

SCK

SCK cycle #

(slave)

(from master)

MODF detected

MSB

MODF detected

MOSI

MISO

(from master)

(from slave)

MSB

Flag

Request

SPIF (SPI data transfer)

SPI Transmitter Interrupt Request

MODF (Mode Fault)

SPI mode-fault Interrupt Request

SPTE (Transmit register empty)

SPI transmit register empty Interrupt Request

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